|
|
Description:
|
mscShelfBusClockSource OBJECT-TYPE
SYNTAX INTEGER {
activeCP(0),
alternate(1) }
ACCESS read-only
STATUS mandatory
DESCRIPTION
"This attribute records the source of the fundamental clock signal
and end-of-cell synchronization signal used by the bus. It contains
one of the following values.
activeCP: the card which is the active control processor (CP) is
providing clock signals
alternate: the card at the opposite end of the module from the active
CP is providing clock signals"
|
|
|
|
